The present invention generally relates to assignment of memory resources, and more particularly to a method for coordinating cache and memory reservation in a computerized system to ensure quality of service (QoS) by avoiding interferences of applications on cache, memory and/or memory controller.
A cache is used to speed up data transfer and may be either temporary or permanent. Memory caches are in every computer to speed up instruction execution and data retrieval and updating. These temporary caches serve as staging areas, and their contents are constantly changing. A memory cache, or “CPU cache,” is a memory bank that bridges main memory and the central processing unit (CPU). A memory cache is faster than main memory and allows instructions to be executed and data to be read and written at higher speed. Instructions and data are transferred from main memory to the cache in fixed blocks, known as cache “lines.”